Ramez Naam writes:
> If TI really delivers this in 2010, it will be a 30x speed up in 10 years,
One should compare apples with apples. TI 'c6x MIPSen look good on
paper, but do not translate very well in real-time performance.
If you do MMX on a 1 kbit bus, that can be contstrued into a lot of
individual operations. That operations are not independant, and pretty
dumb at that, is of little relevant to press release mongers. Dead
tree can take a lot of numbers, without blushing.
> which would be 2 years earlier than expected. More realistically this
> project will slip (as all large scale computing projects do) by a year or
> two. Move the timeline out to 11 or 12 years, and this is right on the
> projected curve.
> Again, I fail to see strong evidence of deviation from an 18 month doubling
> time of computing power.
I don't see anything doubling but the amount of transistors you can
put on a die. This doesn't translate into anything too cool, as long
as you get special cases piled on top of each other (pipeline setup,
burst, keeping ALU/FPU filled with the right magic instruction
mix) for it to happen. Bah, humbug.
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