Re: Blue Gene

Mike Hall (hallboys@stargate.net)
Mon, 06 Dec 1999 20:08:45 -0500

"Robert J. Bradbury" wrote:

The limited instruction set they have has to be highly specific for molecular modeling.

I think the limited instruction set refers not to application design, but to processor architecture. My own take on this is that they are developing an ultra-reduced instruction set processor to maximize hardware speed, by reducing the overhead of fetching and decoding instructions prior to execution to a minimum, and eliminating complex instructions which invoke microcode routines. The trade-off is that you have to execute more machine instructions to perform a given task vs. a complex instruction set processor, but with a good architecture design the improved performance more than offsets the increased processor cycles. A good optimizing HLL compiler can also aid in reducing object code size and instruction path lengths. An efficient application design can also help greatly, but machine efficiency isn't often a priority with application designers and coders.

The good news is that if and when the machine is commercially available, it will probably be an excellent platform for neural modeling. The bad news is that it will still be a massive undertaking to develop the software. I expect most of IBM's $100 million will be devoted to software engineering.

The whole complex consists of 64 processor towers. I wonder if a single tower (or subset of towers) can run standalone, and if they are scalable.

> Have you got a
> limited instruction set highly specific for neurohacking?
> Things like SetSynapseWeight, CopyAllWeights, CopyNeuroPattern,
> etc. come to mind but this really isn't my field.

The good news is that if and when the machine is commercially available, it will probably be an excellent platform for neural modeling. The bad news is that someone (or many someones) will still have to develop the software. I expect that much of IBM's $100 million will be devoted to software engineering.

The whole complex consists of 64 processor towers. I wonder if a single tower (or subset of towers) will be able to run standalone, and if they will be scalable.