Eugene Leitl wrote:
>
> Mapping an algorithm into reecofigurable hardware is *faster* than
> doing it all-purpose hardware, unless you can have a silicon
> foundry within your computer which can churn out new dedicated
> ASICs at a MHz rate. With reconfigurable architectures, you swap
> out virtual circuitry, not code. In fact reconfigurable hardware
> allows the creation of very dynamic, hyperactive machines
> with unified data/code, the most efficient things theoretically
> possible. These things are very new, so even academia doesn't
> quite know how to tackle them yet. You certainly can't go Darwin
> in machina (the next thing after OOP) without them.
http://www.darpa.mil/ito/research/acs/index.html
I came upon this paper a couple of years ago while looking over
http://www.darpa.mil/ito/ResearchAreas.html
it's pretty impressive.
Dwayne
--
mailto:ddraig@pobox.com http://i.am/dwayne
"the cricher we kno as dwayne is only the projection
into our dimension of something much larger and
wirder."
---clae@pa.ausom.net.au
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