# Re: Moore's law

Michael Nielsen (mnielsen@tangelo.phys.unm.edu)
Sat, 27 Jun 1998 13:21:38 -0600 (MDT)

Playing Devil's Advocate here...

On Fri, 26 Jun 1998, Dan Clemmensen wrote:

> Michael Nielsen wrote:
> >
> > Storing stuff in 3-d gives rise to a large dissipation problem.
> > Heuristically, the problem is that the heat generated goes like length
> > cubed (total number of components), while heat dissipated goes like
> > length squared (proportional to the surface area). As I've stated
> > elsewhere, the reversible compution solution to this problem has a large
> > potential hurdle to overcome, in the form of heat generated by error
> > correction, which suffers the same probelm re dissipation.
> >
> I was referring to storage density, not storage speed. Nanomechanical
> storage systems should require no power unless bits are being read or
> written, so power dissipation is a function of I/O speed.

Okay. There is still a slight issue in that addressing is a major
overhead in storage architecture, and involves dynamics; the same caveats
about the need for error correction apply. You also better make sure
that your nanomechanical storage is extremely error free. What happens
if thermal fluctuations flip your bit? Sure, this would be a rare event --
but you're talking about a scenario where the goal is ~ 10^10 bits or more.

> Three-dimensional
> storage in a nonomechanical system, using 100 atoms per bit alllows
> a fair number of extra atoms for "overhead" functions such as support
> and heat-conduction. The energy dissipated to read or write a bit
> nanomechanically should be very small compared to that needed by current
> technology,

Well, it would need to be. Suppose (conservatively), that you are going
to have 10^6 layers, each storing bits with a density of 100 atoms / bit;
a storage density of 1 bit for every few nanometers squared. Such a
device will have roughly 10^12 more bits stored on it than current
commerical chips. I forget the exact numbers, but the dissipation rate
per logical operation is something like 10^6 kT in current chips. That
means you have a major problem unless everything is done completely
dissipation free.

> and diamondoid should be able to operate at much higher
> temperatures than silicon-based devices. Diamondoid is a much better conductor
> of heat than silicon, also.

These are good points, but they only buy you a tiny amount.

Michael Nielsen