my inner geek wrote:
> When it comes to the price of manufacturing RAM, DSPs, and Flat Panel
> displays, how much of that cost has to do with chip packaging,
> marketing, distribution, etc?
Flat panel displays differ from semiconductors. for semiconductors, a large part ofthe cost is in the manufacturing facility (the "fab") Currently, a ne fab costs about 2 billion $US. This fab has a leading-edge lifetime of about 1.5 to 2 years. If it produces 10 million chips per month, the plant's cost will contribute $8.00 to the cost of each chip with no interest.
Packaging is another addtional cost. Typically, the wafer is cut into "dice" at the fab and then shipped to the packaging factory. This one is currently being worked on. There are new techniques that can use typical fab-compatible processes to add metal leads and epoxy covering to the wafer prior to cutting it, thus eliminating the need for a separate packaging house. The resulting itty-bitty devices, called "chip-scale packages" or CSPs, have micro-BGA leads instead of pins. These require new printed circuit manufacturing techniques.
> Is there a type of RAM that can be manufactured so that the entire 8"
> or 10" wafer can be used at once? Is there some type of built in
> logic that can continuously check for bad memory regions, then route
> around them? Kind of like a Thinking Machine on a wafer?
This approach is called "wafer-scale integration." It was heavily
touted and researched by a company called (as I recall) "Trillium"
in the mid-80's. The company failed after spending great gobs of
money. (Wafers are now measured in mm. Current generation is 200mm
or about 8". New generation is 400mm or about 12". Remenber when
disks were 14" and wafers were 2"?) One drawback with wafer-scale
integration is that a current-generation wafer costs about $500.
> By skipping the ceramic mount portion of the packaging, would it be
> possible to make computer that have all of the ram, parallel DSPs,
> and flat display circuitry combined: all manufactured and assembled
> simultaneously in clean room facilities?
Flat-panel displays don't use wafer-processing processes. More
subtly, logic processes (DSPs, etc.) are quite different than
memory processes even though both are wafer-based. There is a whole
lot of current activity to bring these together, but it isn't easy.
You can build memory with logic processes or logic with memory processes,
but only at a huge loss in density, power effiency, or both.
> For example, see MicroDisplay (http://www.microdisplay.com/). If
> these displays could be made the size of a Mead Notebook, with RAM
> and parallel DSPs all built into the same package, they could replace
> books, with excellent paper-like resolution.
> If we put a MEMS fisheye camera in every pixel, this could also
> double as a vanity mirror.
Probably easier to use a CCD or the newer CMOS camera technology, to reduce the complexity of the lens system.
--purely plastic devices made from plastic insulators, conductors, and semiconductors. Even if these are bigger and slower, the substrate costs pennies instead of hundreds of dollars, The fab costs $100,000 instead of $2billion, and the result is stackable, which regains most of the density lost to semiconductors.
--multi-layered semiconductor packaging. This is (sort of) an extension of CSP (see above) to make the wafers a whole lot thinner and then bond them together.
--spherical dice. This is too weird and I don't really get it, but one manufacturer is trying to build semicoinductors using a substrate the size and shape of a small ball bearing.
If you want to try to follow this industry, try