From: http://techweb.cmp.com/eet/news/98/990news/eda.html
BEVERLY, Mass. -- A radical new approach to system-on-a-chip architecture
and design is under development by Improv Systems, a startup launched here
recently by several EDA veterans. If this company's Programmable System
Architecture (PSA) and Java-based design system take hold, 21st-century
chip design will bear little relationship to any methodology known today.
Improv Systems is headed by several recent employees of Cadence Design's
Alta Group, including Cary Ussery, president and chief executive officer;
Oz Levia, vice president of engineering; and Ray Ryan, director of PSA
hardware. The new company, which has no relationship to Cadence, plans to
make its money by licensing PSA to semiconductor vendors and will offer
its Windows NT-based design system without charge. Improv Systems is
proposing a new approach that changes the very vocabulary of design. There
is no notion of "hardware" vs. "software" design; instead, one uses a
Java compiler to map a binary image onto a PSA chip. Synthesis, simulation
and layout as we know them today don't exist, nor does intellectual
property in the form of soft or hard cores. While it might be tempting to
think of a PSA chip as a kind of glorified SRAM-based field-programmable
gate array, it's actually unlike anything that now exists. Billed as a new
alternative to the von Neumann/Harvard computer architecture, a PSAing
paper-thin computers, tiny digital still cameras and other digital
multimedia systems [...].
'gene{ Of course this approach is not exactly new, and not all that
radical. It still uses static (architecture does not change significantly
during the run), rational (similiar to VHDL silicon compilers) design.
However, for the first time reconfigurable hardware has stepped out of the
ivory tower labs into industry R&D. Via circuitry block paging, the path
to protean-flux architectures is now open, even though this substrate is
definitely not suitable for low-level Darwin in machina. This must be a
fine-grained architecture, potentially capable of bad-block remapping at
production and operation stage -- hence a deep-submicron
wafer-scale-integration-enabling key technology. (We have been waiting for
WSI far too long, methinks).
Even more important is the imminent paradigm change in the heads of system
designers -- more radical approaches as evolvable hardware and CAMs
suddenly stop sounding like unintelligible noise.
The Wintel technology road block may suddenly give, granting us a few
frantic years of progress before saturation sets in again.
Even though limited to 2d architectures, and being still quite grainy, the
new architecture boosts _nondedicated_ performance by orders of magnitude,
augmented by the boons WSI will be granting us.
The arbitrary boundary between hardware and software will go away, opening
large-scale free projects even wider vistas. The primate of design may
emerge, the first harbinger of the revolution molecular manufacturing is
promising us.
Somewhat more unfortunate will be the growing impact of outfit size (Intel
would be a nice example for a semimonopoly), as future market success will
depend on investments in inherently costly R&D, as new processes and wafer
fabs.
On a more lunatic note, a malignant, Blightlike Singularity (artefacts
awakening as a global whole) appears to become a bit more possible. }